Henry’s Homepage

Hello, thanks for visiting my personal website.

I am a first-year PhD candidate at the National University of Singapore, with a strong interest in the broad area of digital circuit design.

I am inherently an engineer! I love building things hands-on, and seeing them work. I like to keep things neat and tidy, from my room to my Python docstrings.

Projects

My Master’s project was spiking neural network (SNN) implementation on field-programmable gate array (FPGA), supervized by Dr Matthew Tang.

I was previously working on performance feedback and modelling for high-level synthesis (HLS) at Cornell University, supervized by Prof. Zhiru Zhang and his excellant PhD student, Niansong Zhang.

Past projects include RISC-V processor design, and an arbitrary-precision rendering accelerator for Gaussian splatting (see CV for details).